Lead Design Verification Engineer

Experience: 10+ Years

Location: Bangalore

Job Description:

We are looking for an experienced Design Verification Engineer with strong expertise in IP/Sub-system/SoC level verification and high-speed protocols . The candidate will be responsible for driving end-to-end verification activities, defining verification strategies, and leading complex verification closures.

Key Responsibilities:

• Define and execute verification plans and methodologies for IP and SoC level designs.
• Develop scalable UVM/SystemVerilog based verification environments from scratch.
• Lead testbench architecture, stimulus creation, scoreboards, assertions, and functional coverage