A leading semiconductor provider in Singapore seeks a DFT Engineer to develop and implement low-power design for test (DFT) architectures. The ideal candidate will have a BS/MS in Electrical Engineering and at least 10 years of experience in DFT implementation. Responsibilities include scan insertion and boundary scan development using EDA tools. Strong communication skills and experience in RTL are essential. Candidates should value innovation and collaboration, contributing to transformative solutions in energy efficiency.
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