The Role

Behavioral models are the silent backbone of every FPGA design flow. When they're accurate, engineers move fast. When they're not, everything downstream pays the price.

At Lattice, we're looking for a Sr Staff Engineer who takes that responsibility seriously — someone who can lead the technical development of analog, digital, and mixed-signal models for our FPGA product portfolio, while working closely with the design and verification teams who depend on them.

This is a hands-on leadership role. You'll be building and validating models, mentoring engineers, and driving quality across one of the most technically nuanced disciplines in FPGA development.

What You'll Do

- Lead the design, development, and validation of behavioral models for analog, digital, and mixed-signal circuits in Lattice FPGAs
- Use simulation tools — Verilog, VHDL, SystemVerilog, SPICE, or equivalent — to perform circuit analysis and validate model accuracy