Req ID: JR86164 Sr Engineer, Memory CAD, Guadalajara

Responsibilities

• Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center.
• Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies.
• Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation.

Minimum Qualifications

• Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Sci...