Description

Responsibilities: This requisition is for an entry-level High-Speed Interface (SerDes) Engineer to strengthen our in-house capability for high-speed PHY/IP development. The candidate will contribute to ongoing product programs and next-generation feasibility studies by executing simulation, verification, and lab characterization tasks under guidance of senior engineers. The role provides a structured growth path toward owning design blocks and driving technical decisions in future tape-outs.

Execute circuit/system simulations and basic analyses for assigned SerDes related blocks; summarize results and next actions.

Support block integration and verification activities (interfaces, regressions, corner coverage) in collaboration with analog/digital/layout teams.

Assist with silicon bring-up and lab characterization by preparing setups, collecting data, and supporting debug and simulation-to-measurement correlation.

Mainta...