**Position:**
Sr DFT Engineer (eInfochips Inc)

**Job Description:**

**What You'll Be Doing:**

+ Design and implement DFT, including scan, MBIST, ATPG, Sims, Post-Si diagnosis at block and SoC level
+ Verify test patterns using gate-level simulations.
+ Collaborate closely with Synthesis, STA and physical design to debug and resolve DFT-related problems.
+ Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.

**What We Are Looking For:**

+ Strong understanding of industry standards and best practices in DFT - Scan, ATPG, JTAG, and MBIST.
+ Proven experience in developing DFT specifications and architectures for complex designs.
+ Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage
+ analysis, and more.
+ Proficiency in Siemens-Tessent, Synopsys for DFT implementation, vector generation,
+ and verification.
+ Ability to co...