Job Description1. Define power states and management hardware architecture for optimal power performance.
2. Design microprocessor-based power management controller and HW assistance designs.
3. Define power architecture by performing power rail tradeoff analysis with adaptive voltage scaling consideration

#LI-LL1Requirement1. Define power management mechanisms based on product requirements, combining both software and hardware considerations. Familiarity with power domain architecture and planning is important.
2. A strong understanding of computer architecture and experience in low power design and power optimization techniques is required.
3. Experience with common SOC components such as embedded processors (DSP/MCU) and bus (ARM bus) system architecture design is advantageous.
4. Proficiency in power modeling and power analysis is a plus.
5. Capable of performing power performance analysis, considering trade-offs with PCB area and costs is a plus.