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Silicon Validation Software Engineer: CPU and Memory Hierarchy
Apple
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Cupertino, United States
Location
Cupertino
Posted
May 29, 2026
Commute
Local Area
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Job Description
**Role Number:** 200638267-0836
**Summary**
Would you like to work on SW that runs on every Apple phone, pad, and Mac computer in the world? Join our team of experienced SW engineers and debuggers in validating Apple's world class silicon. In this highly visible role you will be writing functional validation SW for the CPUs, caches, and memory subsystem of our SoCs, with the aim of identifying logic design and circuit bugs. You will be a SW developer for a system validation tool used widely across Apple's Silicon Engineering group, and will collaborate with SoC design and product engineering teams to debug and drive silicon issues to root-cause.
**Description**
Validate CPU cores, cache coherency, and memory hierarchy behavior on post-silicon platforms.
Develop targeted stress tests to expose incorrect behavior under varying operating conditions(voltage, frequency, and temperature).
Partner with design and architecture teams to correlate silicon behavior ...
**Summary**
Would you like to work on SW that runs on every Apple phone, pad, and Mac computer in the world? Join our team of experienced SW engineers and debuggers in validating Apple's world class silicon. In this highly visible role you will be writing functional validation SW for the CPUs, caches, and memory subsystem of our SoCs, with the aim of identifying logic design and circuit bugs. You will be a SW developer for a system validation tool used widely across Apple's Silicon Engineering group, and will collaborate with SoC design and product engineering teams to debug and drive silicon issues to root-cause.
**Description**
Validate CPU cores, cache coherency, and memory hierarchy behavior on post-silicon platforms.
Develop targeted stress tests to expose incorrect behavior under varying operating conditions(voltage, frequency, and temperature).
Partner with design and architecture teams to correlate silicon behavior ...