#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Verification Engineer on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?

Your Role

Key responsibilities in your new role:

• Assist in developing and maintaining System Verilog - UVM test benches in collaboration with senior engineers and the team
• Contribute to creating and enhancing SV UVM verification components, with guidance and supervision from experienced team members
• Support debugging failing test cases to identify root causes, gaining experience with debugging tools and best practices
• Assist with defining functional coverage models and ensuring coverage goals are achieved under guidance
• Parti...