Join Synopsys as a Senior Layout Design Engineer, emphasizing analog and mixed-signal CMOS layouts. Contribute to the development of innovative high-speed SerDes interfaces in a collaborative setting.
In this senior role, you will leverage 5+ years of analog CMOS design experience to ensure compliance with foundry rules and address signal integrity challenges. Your work will involve collaborating with international engineering teams to optimize device performance through advanced layout practices.
Key Responsibilities:
• Develop analog and mixed-signal CMOS layouts for high-speed SerDes
• Partner with circuit designers for comprehensive layout development
• Manage floor planning and layout verification processes
• Solve signal integrity and ESD design issues effectively
• Create and maintain precise documentation for layout methodologies
Requirements:
• Advanced degree in Electrical or Computer Engineering
• Minimum of 5 years in CMOS layout design
• Ex...