The Opportunity

We are seeking a Digital Verification Engineer to join our Design Centre in Edinburgh, Scotland or Milan, Italy. The role is critical to Allegro's new product development plans, designing advanced power control ICs for a broad range of product applications. You will be part of a new verification team collaborating on verification of gate‑driver ICs and embedded SoCs based on innovative core architectures.

What You’ll Do

• Develop comprehensive verification plans based on detailed microarchitecture specifications.
• Create and maintain SystemVerilog/UVM‑based verification environments to achieve required coverage metrics.
• Define and create UVM‑SV test environments, test plans, tests, and functional coverage.
• Analyze test results, enhance test coverage, and debug unexpected design behavior.
• Run and maintain regression test suites.
• Prepare and/or lead verification reviews.
• Collaborate wit...