We are seeking an experienced Senior Verification Engineer with 8+ years of industry expertise in digital design verification.
Compruebe que cumple con los requisitos de habilidades para este puesto, así como con la experiencia asociada, y luego envíe su CV a continuación.
Responsibilities
The ideal candidate will have a strong background in SystemVerilog and UVM, with proven experience in block-level, subsystem, and top-level verification. Knowledge of both formal and dynamic verification methodologies is essential.
In this role, you will work within the Verification Team to ensure the correctness and functionality of complex microprocessor architectures at the RTL level. You will develop and apply advanced verification methodologies, build testbenches, run simulations, and collaborate closely with design teams to deliver high-quality, production-ready designs.
Requirements
Master’s or PhD in Computer Science, Electrical Engineering, or a related field