Physical Design Technical Lead, ASIC, TPU

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Advanced**

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 10 years of experience with physical design and leading full-chip or massively intricate subchip implementation (e.g., from RTL2GDSII, including key stages like floorplanning, place and route, and timing closure) for high-speed ASICs in advanced process nodes.
+ Experience in Python, Tcl, or Perl scripting.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience with Cadence Innovus, Synopsy...