Job Title: Physical Design Engineer

Location: Minneapolis, MN

Duration: 12 Months

Open to relocation candidates across USA who can relocated on their own expense

Job Summary:

Seeking a senior Physical Design Engineer to own end-to-end backend implementation of a mixed-signal high-speed PHY test chip from synthesized netlist to GDSII tape-out. Responsibilities include floorplanning, PDN, place & route, timing closure, power integrity, DRC/LVS/ERC signoff, DFT integration, and foundry coordination.

Required Skills:

• 6–15 years of Physical Design experience with full chip tape-out ownership


• Strong hands-on expertise in Cadence Innovus, Tempus, and Mentor Calibre


• Experience with mixed-signal/analog-adjacent floorplanning and hard macro integration


• Timing closure,...