My Client:

My client is a global technology company focused on advanced semiconductor and high-performance computing systems. The engineering team is dedicated to building next-generation ASIC solutions across advanced process nodes, supporting large-scale compute-intensive applications. The team operates in a highly technical and fast-paced environment, with strong emphasis on physical implementation, performance optimization, and full-chip delivery. They are currently expanding their physical design team to support growing project demands across advanced nodes.

Job Responsibilities:

• Perform end-to-end physical design implementation from netlist to GDSII for advanced ASIC projects.
• Work on key stages including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and optimization.
• Drive timing closure across MMMC scenarios, including setup/hold fixing, clock optimization, and ECO implementation.
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