Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

JD:

Thorough knowledge of the ASIC designs Place and Route flow and methodology.

Hands-on experience in executing complete PD ownership from netlist to GDS2 including HM level PV, LEC, low-power checks and PDN, STA closure

Hands-on experience in Voltage Islands and low power methodologies, flows and implementation.

Strong background in debugging Congestion and CTS issues.

Expertise in PnR tools (Innovus/Fusion compiler) and flow.

Familiarity with Sign-off(PV/PDN/STA/FV/CLP/Scan-DRC(tk)) methodology and tools.

Understand and implement improving existing methodologies and flows.

Proficient in scripting languages (TCL,PERL,PYTHON).

Self-starter and highly motivated

To have working experience in global team environment.