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Package and Chip thermal/stress simulation engineer
MediaTek
📍
Hsinchu City, Taiwan
Location
Hsinchu City
Posted
June 06, 2026
Commute
Local Area
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Job Description
Job Description1. Package related structure stress analysis including warpage, material study.
2. Package and board level stress modeling for TCT, drop and vibration.
3. IC and package thermal analysis, modeling and characterization
4. Chip-Package-PCB thermal co-simulation and design.
5. System level thermal simulation
6. System level stress simulationRequirement1. Familiar with package thermal characterization modeling and validation flow.
2. Familiar with package stress modeling, reliability test and its corresponding failure mode.
3. Experience on system level modeling is a plus.
2. Package and board level stress modeling for TCT, drop and vibration.
3. IC and package thermal analysis, modeling and characterization
4. Chip-Package-PCB thermal co-simulation and design.
5. System level thermal simulation
6. System level stress simulationRequirement1. Familiar with package thermal characterization modeling and validation flow.
2. Familiar with package stress modeling, reliability test and its corresponding failure mode.
3. Experience on system level modeling is a plus.