Lead STA Engineer

Location- Bengaluru

About the Role

We are seeking a highly skilled Lead Static Timing Analysis (STA) Engineer with 6+ years of experience to join our cutting-edge silicon design team in Bengaluru. As a Lead STA Engineer, you will drive timing closure across complex, high-performance designs, collaborating with cross-functional teams to deliver world-class silicon solutions at scale.

Responsibilities

• Own end-to-end STA flow for large-scale SoC designs, from block-level to full-chip sign-off.
• Develop and optimize timing constraints, methodologies, and scripts to ensure robust timing closure.
• Partner with RTL, synthesis, and physical design teams to identify and resolve timing bottlenecks.
• Perform detailed analysis of timing paths, clocking schemes, and signal integrity issues.
• Drive automation and scalability in STA processes to support next-generation designs.
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