A leading AI technology company in Singapore is seeking an experienced RTL Design Engineer to lead design and verification for ASIC/SoC products. This role requires collaboration with cross-functional teams, strong skills in Verilog/SystemVerilog, and experience in simulation methodologies. Ideal candidates will have a Master's or PhD in Electrical Engineering and a passion for cutting-edge technology. The position offers a competitive salary range of S$80,000 - S$180,000 per year.
#J-18808-Ljbffr