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Job Description
Description
are:a) Assist in Cadence innovus development and validation.
b) Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.
c) Develop test suites of the new features of functional/flow solution.
The Position Requirements are:
a) MS in microelectronics, EE and related majors.
b) Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.
c) Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
d) Good communication in English and Chinese, good confidence and self-motivation.
**Prefer to work 3-4 days per week for 6+ months.
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