Senior DFT Engineer / Lead DFT Engineer/Manager DFT Engineer – SSN & SoC DFT

Location: Bangalore / Hyderabad / Ahmedabad

Experience: 6+ Years

Position Overview

We are seeking an experienced DFT Engineer with strong expertise in full-chip SoC DFT implementation, Scan Insertion, MBIST, ATPG, and Siemens Tessent SSN (Streaming Scan Network) methodologies. The ideal candidate will drive end-to-end DFT execution for complex, high-performance SoCs while optimizing test cost, test time, and silicon quality.

Key Responsibilities

- Lead full-chip and SoC-level Scan Insertion, ATPG, and test compression implementation using Siemens Tessent/TestKompress.
- Architect and deploy Streaming Scan Network (SSN) solutions, including packet delivery configuration, bus-width allocation, and test infrastructure optimization.
- Implement and verify MBIST, memory grouping, custom BIST controllers, and BISR solutions.
- Generate and optimize ATPG ...