HDL Technical Lead (FPGA)

Location: Boulder, CO
Salary Range: $150,000 – $250,000

Overview

A growing RF technology company is seeking an experienced HDL Technical Lead to provide architectural direction and technical leadership across multiple FPGA development programs.

This position is designed for a senior engineer who enjoys leading through technical expertise rather than formal people management. The role combines system-level decision making, cross-program coordination, and hands-on engineering, with approximately 50% of time spent in design, tooling, and complex problem solving.

You will support multiple concurrent programs, helping teams align on architecture, improve design reuse, and make sound technical tradeoffs while ensuring consistent execution across projects.

Key Responsibilities