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Graphics Cache Hierarchy Design Verification Engineer
Apple
๐
Santa Clara, United States
Location
Santa Clara
Posted
May 29, 2026
Commute
Local Area
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Job Description
**Role Number:** 200647235-3760
**Summary**
Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, youโll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). Youโll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means youโll be responsible for crafting and building the technology that fuels Appleโs devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A str...
**Summary**
Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, youโll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). Youโll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means youโll be responsible for crafting and building the technology that fuels Appleโs devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A str...