Job Details

Job Description: Responsibilities may involve supporting memory PHY development across various technical domains such as package layout, electrical modelling, signal and power integrity simulation.

Qualifications

• Basic understanding of IC design, package/platform architectures, signal and/or power integrity knowledge.
• Exposure to package, board layout or 3D modeling tools, and electrical validation is highly value‑added.
• Good communication skills and team player.
• BSEE with relevant or adjacent education syllabus focus.

Job Type

Intel Contract Employee

Shift

Shift 1 (Malaysia)

Primary Location

Malaysia, Penang

Additional Locations

Malaysia, Kulim

Business Group

The Central Engineering Group (CEG) is Intel's data‑driven organization that builds scalable engineering solutions across three pillars: Product Enable...