Job Description1. Familiar with chip digital design flow, including RTL integration, simulation, STA, power analysis and post silicon debugging
2. Low power analysis, including pre-silicon power model creation and big data analysis
3. SoC architecture exploration and performance analysis experience is plus
4. Familiar with DFT is a plus

#LI-YT1Requirement1. Familiar with digital IC design is a plus
2. Experienced in bus (ARM bus) system architecture design is a plus
3. Experience with system verification job is a plus