Position Overview

We are looking for an FPGA / RTL Engineer to own the digital baseband and DSP implementation on our custom SDR hardware for satellite payloads. You will take algorithmic specifications for physical layer and DSP chains and implement them in Verilog/VHDL/SystemVerilog on FPGA/SoC platforms, ensuring timing closure, efficient resource usage, and reliable operation. This role is ideal for someone who enjoys taking waveforms from simulation to real-time hardware running on actual payload platforms.

Key Responsibilities

• Design, implement, and verify core digital logic and DSP pipelines on FPGA
• Implement filters, mixers, NCOs, interpolators/decimators, symbol timing recovery, and carrier recovery blocks in RTL for high-speed digital communications.
• Own FPGA development workflows, including synthesis, place & route, timing analysis, constraint management, and on-chip debugging.