Appealing points: 

• Opportunity to work across the full IP/SOC development lifecycle including architecture, RTL design, verification, synthesis, P&R, and STA, enhancing advanced VLSI engineering skills


• Lead high-quality digital IP development using UVM/OVM, SystemVerilog Assertions, constrained random testing, and Cadence EDA flows in a cutting-edge engineering environment


• Take on a leadership role in Tokyo by driving cross-site program execution, strengthening both technical expertise and project management capabilities