Physical Design or Digital  Back - end engineer, capable of executing needed RTL to GDSII flow.

Will be exposed to a wide range of technology from matured to the latest submicron process nodes.

May assist the lead in resource planning and management for the successful service delivery to clients.

May assist task delegations when assigned.

Lead project items, small, medium and may include large projects.

Key Responsibilities: Full RTL to GDSII (Synthesis and Place and Route) implementation including timing closure Floorplanning and IP Macro placement planning Power planning, implementation and optimization Perform Clock Tree Synthesis (CTS),  Placement, Routing and Static Timing Analysis (STA) Perform Physical Verification (DRC, ERC, LVS, ANTENNA checks) Reliability checks like EM violations check and Signal Integrity issues like crosstalk Generation of GDSII, SPEF, SDF and other model files Contribute in quality assurance c...