Our client, an American multinational semiconductor company headquartered in Santa Clara, California, is seeking an ASIC/RTL Design Engineer to join their team.

**Job Title: ASIC/RTL Design Engineer**
**Project Duration: 6+ months**
**Location: 2100 Logic Drive, San Jose, CA 95124, United States**

**Job Duties:** The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP?s. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC?s in advanced digital CMOS processes. Our RTL Design Engineers are expected to contribute in all aspects of SoC design including Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and s...