You are a skilled verification engineer with a passion for technology and innovation. With a strong background in SystemVerilog and UVM, you possess an eye for details, and with a methodical problem‑solving approach you deliver high‑performance cutting‑edge memory interface IP. Your verification expertise is complemented by your proficiency in scripting languages, enabling you to automate verification processes for efficiency. You are adept at understanding technical specifications, debugging RTL, creating test plans and a robust testbench that ensures high product quality and reliability through functional coverage. You are motivated by continuous learning, staying up to date with emerging technologies and proactively improving team processes and outcomes. As a senior staff engineer, you are a natural mentor, eager to share your expertise with junior engineers, fostering a culture of growth and innovation. You collaborate effectively with architecture and implementation teams, c...