About the Role

We are seeking an experienced candidate to lead the miniaturisation of our cutting-edge probabilistic computing platform. This role is pivotal in defining and executing the ASIC strategy, ensuring optimal integration with other processing units such as FPGAs and GPUs. You will work closely with hardware engineers, algorithm designers, and fabrication partners to deliver a high-performance, cost-effective solution.

We welcome all qualified international candidates to apply for this role. We have offices in Oxford and London, and are open to other international locations.

Key Responsibilities

• ASIC strategy & architecture
  • Assess system components to determine which should be implemented as ASIC versus FPGA or GPU.
  • Define ASIC architecture in alignment with overall system requirements, including interfaces and memory hierarchy.
  • Evaluate trade-offs between different processing units (ASIC, FPGA, GPU, SoC) for...